TSMC and Samsung Commit to ASML High-NA EUV Tools as AI Chip Demand Surges

TSMC and Samsung, the world's two largest chipmakers, have committed to deploying ASML's High-NA EUV lithography machines to produce the next generation of AI chips. The tools, which cost around $400 million each, print smaller and more intricate circuit patterns needed for the complex transistor architectures that AI workloads demand. Alongside the tool commitments, the companies launched an industry initiative to shift from 6-inch to 12-inch photomasks, targeting better productivity and lower per-chip costs. For AI builders, this signals that advanced chip capacity will expand in the late 2020s, but the timelines are ambitious and depend on ASML's ability to ramp production.

What the Commitments Cover

Samsung said it will use High-NA EUV for DRAM production starting in 2028, with broader adoption planned for 2030 to "extend the DRAM scaling roadmap" and improve efficiency. TSMC expects higher usage of the tools for advanced logic chips, driven primarily by "the increasingly complex transistor architectures required for AI applications." Intel was already a customer, adopting High-NA EUV for advanced chip manufacturing earlier in 2026. ASML plans to add about 30% total EUV capacity in 2027, though Barclays notes the company faces a significant decision on whether to expand capacity further given strong demand.

Why the Photomask Shift Matters

A separate industry initiative, announced by ASML and TSMC on September 7 with support from Samsung and Intel, aims to transition from 6-inch to 12-inch photomasks. Photomasks are the stencils used to print patterns on silicon wafers. Larger masks allow more patterns per wafer pass, which ASML says will bring better productivity and lower chipmaking costs. The initiative targets a 12-inch mask pilot line by 2031 and full lithography system readiness by 2033. For AI builders, this move could gradually reduce the cost per transistor, making advanced AI chips more accessible over the next decade.

What This Means for AI Builders

High-NA EUV adoption directly impacts the availability and cost of AI accelerators and high-bandwidth memory. TSMC's advanced nodes are already constrained, with the company warning that supply will remain insufficient for AI-related demand through at least 2028 to 2030. These tool commitments should help close that gap, but not immediately. Builders planning hardware-dependent products should factor in that significant capacity improvements from these tools won't arrive before 2028 for memory and likely later for logic chips. The 12-inch mask transition, while promising, is still years away from production impact.

Caveats and Unknowns

The announcements are commitments, not completed deployments. Timelines may shift based on tool delivery, yield learning, and market demand. ASML has not given a specific forecast for High-NA EUV unit sales, and its decision on further capacity expansion remains open. The $400 million tool price is a major capital investment that will be amortized across many chips, but it raises the bar for fab economics. All claims about productivity gains and cost reductions come from ASML and the participating companies; independent verification will follow as production data emerges.