
Synopsys pivots from fab software to AI design margins
Published by AINave Editorial • Reviewed by Ramit
Synopsys is walking away from the factory floor. The EDA giant has told more than 10 chipmakers that it will stop offering its Equipment Engineering System (EES) and Fault Detection and Classification (FDC) manufacturing analytics suites, redirecting the engineers behind those products toward higher-margin AI chip design tools. The move signals a strategic bet that autonomous design software, not factory maintenance contracts, will drive the next decade of growth in semiconductor EDA.
What happened
Synopsys sent end-of-life notices in April and May to customers including Samsung Electronics, SK Hynix, Kioxia, and Qorvo. The two products at the center of the decision are the Equipment Engineering System (EES) and Fault Detection and Classification (FDC), which two sources described as the nervous system of a fabrication plant, monitoring equipment in real time and flagging anomalies before they cause defects. Synopsys told Reuters it was discontinuing “certain manufacturing analytics products, which are older diagnostic tools not in our customers’ critical paths of production.” Maintenance and support obligations are set to conclude by July, with no future versions planned.
The software came to Synopsys through its 2021 acquisition of manufacturing solutions from South Korean firm BISTel. Letting it go fits a broader reshaping of the EDA industry, where vendors pour resources into AI design tools while chipmakers increasingly write their own factory software. The pivot follows Synopsys’ $35 billion acquisition of Ansys in 2025 and a $2 billion vote of confidence from Nvidia in the AI-design direction.
Why AI builders should care
For teams building AI chips or designing custom silicon for AI workloads, this move signals where the EDA ecosystem is heading. Synopsys is reallocating engineering hours from factory-floor tooling to AI-driven design workflows, including technology it unveiled in March that lets AI agents take over many chip creation tasks. The bet is that autonomous design software will deliver higher margins than manufacturing analytics, which required customers to share tightly held production data and faced competition from in-house tools at companies like Samsung.
This shift also creates an opening for startups and in-house teams to fill the gap left by Synopsys’ retreat from fab software. Chipmakers that relied on EES and FDC now need alternatives, whether built internally or sourced from third-party vendors. For AI builders, the takeaway is that the EDA toolchain is consolidating around AI-enabled design, which could accelerate the pace of custom chip development but also increase dependency on a smaller set of vendors.
Practical implications
Samsung confirmed the end-of-life decision and said it had lined up compatible alternatives, expecting no negative impact on production. Other customers like SK Hynix, Kioxia, and Qorvo either declined to comment or did not respond. One source cautioned that stripping out maintenance and patches could dent production yields at some chipmakers over time, since the software needs constant upkeep. Four other sources said they expected no impact at major manufacturers.
Synopsys has already laid off a few dozen staff linked to the discontinued products, though the company declined to confirm the number or timing. The human cost is part of a broader reallocation: Synopsys plans to redirect engineers from support and maintenance work to AI design, where it sees higher growth and margins.
Caveats
The plans are based on Reuters reporting attributed to six people briefed on the matter, not on a public company roadmap. Synopsys did not name the products publicly and said it would keep investing in the manufacturing analytics area while honoring existing contracts. The actual impact on yields and production timelines remains uncertain and depends on each customer’s ability to transition to alternatives. The information reflects end-of-life notices and ongoing maintenance commitments rather than confirmed product roadmaps.
FAQs
Why is Synopsys ending its chip fabrication (fab) manufacturing software like EES and FDC?
Synopsys is ending its Equipment Engineering System (EES) and Fault Detection and Classification (FDC) products to free up engineers from maintenance and support work. The company wants to redirect those resources toward higher-margin AI chip design, a strategic shift accelerated by its $35 billion acquisition of Ansys in 2025 and backed by a $2 billion investment from Nvidia. Synopsys told more than 10 chipmakers that the tools had reached end of life, with no future versions planned.
How does shifting resources to AI design affect chip yields and manufacturing efficiency?
Some clients warned that removing maintenance and patches could dent production yields over time, since fab software requires constant upkeep. However, Samsung confirmed it had lined up compatible alternatives and expected no negative impact on production. Other manufacturers like SK Hynix, Kioxia, and Qorvo did not comment on yield impact. The actual effect will depend on each customer’s ability to replace the tools or maintain them internally.
What does this pivot mean for customers such as Samsung, SK Hynix, and Qorvo?
Samsung confirmed the end-of-life decision and said active discussions with Synopsys were underway. It had already identified compatible alternatives and expected no negative impact on production. SK Hynix declined to comment, while Kioxia and Qorvo did not respond to requests. These customers now face a transition away from Synopsys’ factory-floor tools, either to in-house solutions or third-party alternatives.
How does the Synopsys-Ansys deal influence the AI design tools market?
The $35 billion Ansys acquisition gives Synopsys a broader multiphysics simulation portfolio, which it can integrate with AI-driven design workflows. The deal is a key enabler for Synopsys’ bet on autonomous design software and higher-margin AI tools, rather than factory maintenance contracts. It signals that the EDA industry is consolidating around AI-enabled design as the primary growth vector.
Sources
- Synopsys pulls back from chip fab software to chase AI design margins
- Synopsys to cut chip fab manufacturing control software in shift to AI...
- Synopsys Abandons The Factory Floor For The AI Gold Rush - Ciente
- Synopsys Launches Multiphysics Fusion for Chip EDA — Web Pulse
- Tech Cold War Escalates: Synopsys Pulls Back from... - techovedas
- Synopsys to cut chip fab manufacturing control software in shift to AI design, sources say
- Synopsys pivots to AI, scales back fab software business - Reuters
- Synopsys raises annual forecast on demand for AI chip design software
- Synopsys to cut chip fab manufacturing control software in ...
- Synopsys (SNPS) and the Risks of AI-Focused Strategy on Core ...
- Synopsys plans 10% job cuts after Ansys deal closure | Reuters
- Synopsys and EDA: How AI Is Redesigning the Tools That Design ...
- Synopsys pivots to AI, scales back fab software business - Reuters
- Synopsys pulls full-year guidance, citing new China export restrictions
- Synopsys to phase out chip manufacturing software as AI design becomes strategic focus (SNPS)






















